This section is intended to provide information relevant to understanding various technologies described herein. As the section's title implies, this is a discussion of related art that should in no way imply that it is prior art. Generally, related art may or may not be considered prior art. It should therefore be understood that any statement in this section should be read in this light, and not as any admission of prior art.
Conventional receiver circuitry may operate from a supply voltage that matches a “native voltage” (e.g., a “technology limit value”) of components within the receiver circuitry. Sometimes, a voltage drop across terminals of the components of the receiver circuitry may be lower than the native voltage so as to inhibit damage due to overstress, which may lead to ensured reliability. For instance, if the receiver circuitry is implemented with CMOS devices with a native voltage of 1.8V, the receiver circuitry may utilize a 1.8V supply voltage. This supply voltage may exceed a supply voltage of a destination voltage domain (e.g., about ˜1V), and the receiver circuitry may generate an output signal that is down-converted to the supply voltage range of the destination voltage domain.
The above technique may work provided that voltage of the input signal does not vary in a range that exceeds a supply voltage of the receiver circuitry, e.g., when the input signal does not vary in a range greater than 0V-1.8V. However, in some systems, the receiver circuitry should be able to handle input signals from a 2.5V or 3.3V source voltage domain. However, wherever the source voltage domain operates from a supply voltage that exceeds the native voltage of the components within the receiver circuitry, this may give rise to reliability problems due to components within the receiver circuitry potentially being exposed to a voltage overstress during the course of operation.
In some scenarios, it may be useful for the same receiver circuitry to operate with input signals having various different ranges of voltage swing, e.g., 0V-1.8V, 0V-2.5V, and/or 0V-3.3V. For instance, the source voltage domain may be able to switch between multiple different supply voltages (e.g., in different operating modes), and therefore, the receiver circuitry may be able to operate correctly irrespective of the current source supply voltage used by the source voltage domain.
Further, in situations where the receiver circuitry operates from a supply voltage matching the native voltage of its components, other problems may arise when attempting to reliably detect logic low to logic high and logic high to logic low transitions in the input signal across the various different voltage ranges of the input signal. For instance, if a minimum input voltage that may cause detection of a logic high state of the input signal is referred to as VIH, and a maximum input voltage that may cause detection of a logic low state of the input signal is referred to as VIL, a situation may arise where there is insufficient margin to reliably detect the logic high and logic low states.
For instance, when an input of the receiver circuitry is coupled to a 3.3V driver, JEDEC TTL levels may indicate that, if the receiver circuitry uses a 1.8V supply voltage, then its corresponding VIH and VIL values may be 2V and 0.8V, respectively. Thus, such receiver circuitry may be sized to have its trip point for detecting a logic low level set higher than 0.8V, and its trip point for detecting a logic high level set lower than 2V. If the same receiver circuitry were then used to detect an input signal using a 1.8V supply voltage, then its VIH and VIL values may be 1.155V and 0.585V, respectively. As such, the trip points may be set with respect to the lowest VIH and highest VIL, and there may be a margin of 0.355V between the lowest VIH and highest VIL values.
In this instance, it may be difficult to maintain reliable trip points with this small margin. Moreover, if effects such as noise are introduced, then this may further reduce the margin, thus potentially causing incorrect operation and reduced reliability.